Re: Calibre LVS extraction with multiple fingers
Hi Sam, I already had this setting, thank you for the help though. Edouard
View ArticleRe: Can we use Pads 9.5 version even after i updated to pads Standard.
Hi Sharath, You can use it however you will need to update all instances of mgc.pkginfo in the Pads 9.5 install folder with the most recent copy from supportnet so the 9.5 version of the software will...
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Re: batch install failing becasue of spaces in path name
Yes, that would be why it failed. Sorry about that!A couple of changes that should hopefully get it working:1) Comment or remove the "PUSHD "%~dp0" line directly above the ":LOOP" line. 2) Remove the...
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Symbol Editor - difficulty selecting overlapping properties
I'm editing/customizing a title block symbol. Some of the properties, such as @PRINTORDER and @SHEETTOTAL, are very close to each other horizontally. In this case, I want to see 'm of n' on the title...
View ArticleADMS error during spice simulation
Hi,I am doing a Serdes spice simulation using Hyperlynx 9.3. I am trying to incorporate a driver spice model as well as a connector touchstone model into the schematic. But, when both these models are...
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Re: Is there a decryption tool for EDX similar to the decryption for HKP's...
EDX is an open standard. Content of EDX can be read/created using any code (based on spec) or with use of EDX-SA Utilities (www.edx-sa.com).As far as Mentor provided content in EDX, there are portions...
View ArticleRe: Can we use PartQuest Symbols in pads Logic?
Hi Gray,Is mentor team having any plan to upgrade for the feature of using part-quest symbols in to Pads Logic.
View ArticleRe: Can we use Pads 9.5 version even after i updated to pads Standard.
Thank you for the reply robert. I can explain you my need in short and understandable way.I was using 9.5, now i feel like upgrading to pads standard, so here the pads standard license file will be...
View Article3D via modelling in hyperlynx v9.2
I am using hyperlynx v9.2 for 3D EM simulation, i have exported 3D area of differential via from board sim and assigned the ports, while simulating in MGRID it asks for meshing frequency i gave it as...
View ArticleRe: 3D via modelling in hyperlynx v9.2
hi, regarding the result of course I can't say a lot without seeing it. probably somewhere inside of the geometry a connection is not as it should be. But you are right, the solver doesn't solve all...
View ArticleRe: 3D via modelling in hyperlynx v9.2
Thanks for the reply. I have used hyperlynx v9.3 nimbic it gave proper result, same via I am simulating in v9.2.I have exported in 3d then there is port...
View ArticleVia modeling in hyper lynx IE3D solver.
Hi,I am simulating differential via having cases of back-drilling and without back-drill in order to observe impedance discontinuity. I selected the required 3D area and exported in 3D solver and...
View ArticleRe: Via modeling in hyper lynx IE3D solver.
Regarding port assignment there is no difference between backdrilled and not backdrilled. Does the via barrel length really reflect your intention to look at backdrilled and not backdrilled scenario?...
View ArticleRe: 3D via modelling in hyperlynx v9.2
In HL3D I have seen very small opens between the polygon which you can look for with the check connection command. In 9.3 based on the HL Advanced Solver technology we don't see this effect. That's why...
View ArticleNo backups are made?
HiAnyone seen that in some cases PADS does not generate backups - even if the design has changed several times during the day?One of my colleagues has this problem. Sometimes the design is not backed...
View ArticleRe: I've installed the license properly however Flowtherm XT just doesn't...
Hi Andrew,Before re-loading the OS, there are a couple more things that you could check:Do you get any error message from FloTHERM XT?Is anything reported in the debug.log file (identified in the...
View ArticleRe: Reusable blocks editor grayed out in CL
Both of these features are for the Xpedition flow currently.
View Articlelibrary terminal overlap in symbol during symbol creation
Does anybody know how to prevent a terminal been accidentally overlap with another terminal during library creation? Is there any script to verify library. The current Check part is not able to capture...
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ECO Errors from PADS Logic to PADS Layout
Hello All , We are facing ECO errors in generating correct data for placement files . Sometimes even though the component is placed on the top and placement files is generated component gets swapped in...
View Articlelooking for xDX - Project Close / Closing Event
Hello,I am looking for a Event which gets fired when I am closing the complete Project.I found Events whenClosing a Schematic Sheet / Schematic PageClosing / Shutting down xDX Designer has someone here...
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